Please use this identifier to cite or link to this item: https://hdl.handle.net/11147/7119
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dc.contributor.authorKılınççeker, Onur-
dc.contributor.authorTürk, Ercüment-
dc.contributor.authorChallenger, Moharram-
dc.contributor.authorBelli, Fevzi-
dc.date.accessioned2019-02-20T07:18:11Z-
dc.date.available2019-02-20T07:18:11Z-
dc.date.issued2018-
dc.identifier.citationKılınççeker, O., Türk, E., Challenger, M. and Belli, F. (2018 July 16-20). Regular expression based test sequence generation for HDL program validation. Paper presented at the 18th IEEE International Conference on Software Quality, Reliability, and Security Companion, QRS-C 2018. doi:en_US
dc.identifier.isbn9781538678398-
dc.identifier.urihttp://doi.org/10.1109/QRS-C.2018.00103-
dc.identifier.urihttp://hdl.handle.net/11147/7119-
dc.description18th IEEE International Conference on Software Quality, Reliability, and Security Companion, QRS-C 2018; Lisbon; Portugal; 16 July 2018 through 20 July 2018en_US
dc.description.abstractThis paper proposes a test sequence generation approach for behavioral model validation of sequential circuits implemented in Hardware Description Language (HDL). In the procedure of test sequence generation proposed in this study, Regular Expressions (REs) are utilized to model the behavior of the System Under Test (SUT). First, the HDL program is converted to a Finite State Machine (FSM). Then, the obtained FSM is transformed to RE which is represented by a Syntax Tree (ST). In this way, the test sequence generation problem is simplified to the tree traversal algorithm in which symbol and operator coverage criteria are satisfied. The required tools for test sequence generation are provided to automatize the whole procedure of the proposed approach. Also, a running example, based on a real-life-like Traffic Light Controller (TLC), validates the proposed approach and analyzes its characteristic features.en_US
dc.language.isoenen_US
dc.publisherInstitute of Electrical and Electronics Engineers Inc.en_US
dc.relation.ispartof18th IEEE International Conference on Software Quality, Reliability, and Security Companion, QRS-C 2018en_US
dc.rightsinfo:eu-repo/semantics/openAccessen_US
dc.subjectBehavioral modelen_US
dc.subjectHardware description languageen_US
dc.subjectHardware design validationen_US
dc.subjectRegular expressionen_US
dc.subjectTest sequence generationen_US
dc.titleRegular expression based test sequence generation for HDL program validationen_US
dc.typeConference Objecten_US
dc.authoridTR125949en_US
dc.institutionauthorBelli, Fevzi-
dc.departmentİzmir Institute of Technology. Computer Engineeringen_US
dc.identifier.startpage585en_US
dc.identifier.endpage592en_US
dc.identifier.wosWOS:000449555600090en_US
dc.identifier.scopus2-s2.0-85052490247en_US
dc.relation.publicationcategoryKonferans Öğesi - Uluslararası - Kurum Öğretim Elemanıen_US
dc.identifier.doi10.1109/QRS-C.2018.00103-
dc.relation.doi10.1109/QRS-C.2018.00103en_US
dc.coverage.doi10.1109/QRS-C.2018.00103en_US
item.openairetypeConference Object-
item.openairecristypehttp://purl.org/coar/resource_type/c_18cf-
item.fulltextWith Fulltext-
item.languageiso639-1en-
item.cerifentitytypePublications-
item.grantfulltextopen-
crisitem.author.dept03.04. Department of Computer Engineering-
Appears in Collections:Computer Engineering / Bilgisayar Mühendisliği
Scopus İndeksli Yayınlar Koleksiyonu / Scopus Indexed Publications Collection
WoS İndeksli Yayınlar Koleksiyonu / WoS Indexed Publications Collection
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