Please use this identifier to cite or link to this item: https://hdl.handle.net/11147/4954
Title: FPGA implementation of a low-complexity fading filter for multipath Rayleigh fading simulator
Authors: Toker, Kadir Atilla
Özen, Serdar
Arsal, Ali
Özen, Serdar
Izmir Institute of Technology. Electronics and Communication Engineering
Keywords: Rayleigh fading
FPGA implementations
Field programmable gate arrays
Gaussian noise
Digital domain
Issue Date: 2011
Publisher: Institute of Electrical and Electronics Engineers Inc.
Source: Toker, K. A., Özen, S., and Arsal, A. (2011, August 13-20). FPGA implementation of a low-complexity fading filter for multipath Rayleigh fading simulator. Paper presented at the 30th URSI General Assembly and Scientific Symposium. doi:10.1109/URSIGASS.2011.6050853
Abstract: A low-complexity high performance Rayleigh fading simulator and its Field Programmable Gate Array (FPGA) implementation are presented. This proposed method is a variant of the method of filtering of the white Gaussian noise where the filter design is accomplished in the analog domain and transferred into digital domain. The proposed method outperforms AR(20) filter and modified Jakes' generators in performance. Although IDFT method achieves the best performance, it brings a significant cost in storage. The proposed method achieves high performance with the lowest complexity, and its performance has been verified on commercially available FPGA platforms. © 2011 IEEE.
Description: 30th URSI General Assembly and Scientific Symposium, URSIGASS 2011; Istanbul; Turkey; 13 August 2011 through 20 August 2011
URI: http://doi.org/10.1109/URSIGASS.2011.6050853
http://hdl.handle.net/11147/4954
ISBN: 9781424451173
Appears in Collections:Electrical - Electronic Engineering / Elektrik - Elektronik Mühendisliği
Scopus İndeksli Yayınlar Koleksiyonu / Scopus Indexed Publications Collection

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