Robust and Energy-Efficient Hardware Architectures for Dizy Stream Cipher

Abstract

In the era of ubiquitous computing, efficient and secure implementations of cryptographic hardware are crucial. This paper extends the hardware implementations of a Small Internal State Stream (SISS) cipher, namely DIZY. Previous work shows that DIZY's hardware performance, in terms of area cost and power consumption, is among the best when compared to notable stream ciphers, especially for frame-based encryptions requiring frequent initialization. In this study, we initially optimize the existing hardware implementation and then evaluate the energy efficiency of DIZY. We implement different unrolled versions of DIZY and analyze their energy consumption. Furthermore, we address physical security by integrating masking techniques into the DIZY S-box to protect the implementation against side-channel attacks. We thoroughly investigate the associated overhead and apply optimizations to reduce it, ensuring robust security without compromising efficiency. Our results present a secure, energy-efficient, and lightweight cryptographic hardware design for the stream cipher DIZY, making it suitable for various applications, including Internet of Things (IoT) and embedded systems. © 2024 IEEE.