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Towards test case generation for synthesizable VHDL programs using model checker
(IEEE, 2010-07)
VHDL programs are often tested by means of simulations, relying on test benches written intuitively. In this paper, we propose a formal approach to construct test benches from system specification. To consider the real-time ...
Feedback control based test case instantiation for firewall testing
(IEEE, 2010)
A firewall's proper functioning is critical to the network it protects. Thus, a firewall should be tested with respect to its intended security policy. We propose a feedback control based approach for test case generation ...