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dc.contributor.authorAyav, Tolga
dc.contributor.authorTuğlular, Tuğkan
dc.contributor.authorBelli, Fevzi
dc.date.accessioned2016-12-02T14:18:24Z
dc.date.available2016-12-02T14:18:24Z
dc.date.issued2016-12-02
dc.identifier.otherIYTE-COMPENG-2015-001
dc.identifier.urihttp://hdl.handle.net/11147/2571
dc.descriptionTechnical Report No: IYTE-COMPENG-2015-001en_US
dc.description.abstractThis report presents the transformation of behavioral VHDL programs to Timed Automata.en_US
dc.language.isoengen_US
dc.rightsinfo:eu-repo/semantics/openAccessen_US
dc.subjectVHDLen_US
dc.subjectTimed automataen_US
dc.titleTransforming VHDL to timed automataen_US
dc.typereporten_US
dc.contributor.authorIDTR114453en_US
dc.contributor.authorIDTR114656en_US
dc.contributor.iztechauthorAyav, Tolga
dc.contributor.iztechauthorTuğlular, Tuğkan
dc.contributor.iztechauthorBelli, Fevzi
dc.contributor.departmentİYTE, Mühendislik Fakültesi, Bilgisayar Mühendisliği Bölümüen_US
dc.relation.publicationcategoryDiğeren_US


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